Lecturer in Nanoelectronics and Royal Academy of Engineering Research Fellow
T: +44 (0)20 3108 1116 (int. 51116)
Power-efficient ML hardware | memristive technology | neuromorphic engineering
Dr Mehonic received a BSc in Electronic Engineering from the University of Sarajevo in 2009 and was awarded the Golden Badge, the best student award. He graduated from University College London (UCL) with an MSc in Nanotechnology (Distinction, Oxford Instruments prize for the best MSc project) in 2010 and PhD in 2014 (top 3 best PhD thesis in 2013/14, EE Department), demonstrating the first ambient operating all-SiOx memristor. He has been working as a Research Associate in the group of Electronic Materials and Devices, EEE UCL till 2017, further developing silicon oxide memristive technology. In 2017, he was awarded a highly prestigious 5-year Royal Academy of Engineering Research Fellowship to work on neuromorphic technology for energy-efficient AI hardware. In 2019, he was appointed as a Lecturer in Nanoelectronics. He serves on the advisory boards of Wiley’s Adv. Intelligent Systems and is an Editor for Frontiers in Materials and Frontiers in Nanotechnology. He is a board member for IoP’s Dielectrics and Electrostatics group, and an IoP and IET member. At the EEE department, he is the director of the MSc in Nanotechnology.
To date, he has authored more than 40 journal publications and over 60 international conference proceedings (including more than ten invited talks). His research resulted in two major EPSRC project grants - EP/K01739X/1 in 2013 and EP/P013503/1 in 2016, and a Leverhulme grant in 2016 , and the RAEng Research Fellowship in 2017. He is the inventor of 5 resistance-switching patents and co-funder of spinout company (“IntrinSic Semiconductor Technology”), where he serves as a Chief Technology Officer. He received the “One to Watch 2015” award from UCL Enterprise for UCL’s most innovative staff.
His current work is focused on energy-efficient nanoelectronics and functional materials. More specifically, he works on non-von Neumann computing paradigms harnessing the physics of memristive devices to perform both memory and computing. He is interested in circuits and algorithms for on-chip implementation of ML/AI and nonconventional information processing algorithms (e.g. spike-based computing).
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