Improving high-performance transistor technology
12 December 2014
UCL research has helped the microelectronics industry to improve the quality and reliability of high-performance devices based on transistors. SEMATECH, a technology research and development consortium, disseminates UCL's insights into improving reliability and reducing energy loss to some of the world's biggest microchip manufacturers.
Transistors are the fundamental building blocks for all computer chips. Over the last 15 years, the microelectronics industry has used silicon dioxide (SiO2) to produce transistors, and transistor size has decreased with each generation. However, as transistors shrink, current leakage increases, limiting computer processor performance and increasing energy consumption. Managing that leakage is crucial for reliable high-speed operation, and is becoming an increasingly important factor in chip design and the reduction of power consumption. The semiconductor industry is also struggling with the heat of chips, which increases exponentially as the number of transistors on a chip increases. Controlling leakage by using new high-k dielectric materials such as hafnium dioxide instead of SiO2 is one of many steps towards making sure that scaling of devices continues and ever-smaller transistors run reliably.
Since 2001, a group led by Professor Alexander Shluger (UCL Physics & Astronomy) has investigated how to improve reliability and minimise energy loss in transistors. The group has had a number of contracts with SEMATECH (SMT), a non-profit, world-leading technology research and development consortium, which includes several of the world's biggest microchip manufacturers such as IBM, Intel and Samsung. The consortium works to accelerate the development of the advanced manufacturing technologies that will be needed to build more powerful semiconductor devices.
Since 2004, UCL has been actively involved in three major programmes at SMT, providing important insights to the consortium. These have included the development of the next generation of gate dielectrics, known as higher-k dielectrics. UCL's findings on hafnium dioxide helped SMT reduce the thickness of the HfO2 layer, reducing instability, and reduced the effect of defects by modifying processing conditions.
As transistors shrink further, atomistic simulations can provide crucial insight into their performance and help to improve reliability. A new generation of electrical engineers and technologists came to appreciate the importance of such simulations and to use them in designing and improving new devices. - Professor Alexander Shluger
Industrial partners have implemented recommendations made by SMT in their manufactured devices, such as the 22nm process technology released by Intel in 2011. Other companies - IBM, TSMC, Samsung and GlobalFoundries - now also make use of the hafnium-based dielectric in their microchip technologies.
Another programme involved the development of advanced non-volatile memory, based on a well-controlled and highly repeatable change of the dielectric resistivity rather than on a conventional electron storage technology. Based on UCL's findings, SMT was able to optimise the material properties and fabricate high-performance memory devices.
Further work looked into the mechanisms of dielectric degradation, which greatly determines overall device reliability. The UCL group provided an atomic-level description of the defect generation process in the silicon dioxide dielectric when subjected to electrical stress. SMT used this finding to develop a model capable of estimating the device lifetime, which was highly rated by member companies.