Call for Papers

Second International Workshop on

Compact Thin-Film Transistor (TFT) Modeling for Circuit Simulation

University College London, London, UK

September 25, 2009

In recent years, the increasing use of active matrix flat-panel displays and bio-medical imagers in commercial electronic products has drawn a significant attention to thin-film transistors (TFT) and technologies. TFTs on amorphous- and poly-silicon as well as newly emerging organic, transparent metal oxide and nano-composite semiconductor technologies are becoming increasingly common. For example, flat panel displays are finding widespread use in many products such as cellular phones, personal digital assistants (PDAs), camcorders, laptop personal computers (PCs), to name a few. The active matrix display is composed of a grid or matrix of picture elements called as "pixels". Thousands or millions of these pixels together create an image on the display, in which the TFTs act as switches to individually turn each pixel. More increasingly TFTs are starting to be used as analog circuit elements for rudimentary signal conditioning. Therefore, physically-based compact modeling of TFTs for circuit simulation is crucial to accurately and reliably predict TFT behavior in the active matrix. A concentrated R&D effort is critical for developing physically-based compact TFT models for emerging thin-film technologies, and significant R&D efforts along these lines are underway world-wide.

This workshop will provide a forum for discussions and current practices on compact TFT modeling. The workshop is sponsored by IEEE EDS Compact Modeling Technical Committee in joint collaboration with University College London and Cambridge University. A partial list of the areas of interest includes:


                  Physics of TFTs and operating principles

                  Compact TFT device models for circuit simulation

                  Model implementation and circuit analysis techniques

                  Model parameter extraction techniques

                  Applications of compact TFT models in emerging products

                  Compact models for interconnects in active matrix flat panels

Submission of 4-page paper to be included in proceedings: September 14, 2009

Although paper format is preferred, suitably formatted presentations will also be accepted for inclusion in the conference proceedings

Prospective authors should submit an abstract of up to 500-word to: m.bauza@ucl.ac.uk

REGISTRATION FORM

Registration for the conference and morning coffee/tea are scheduled from 8:30am to 9:30am.

PROGRAM OF THE WORKSHOP

Directions and maps.

2009 C-TFT workshop will take place in UCL chemistry building, Ramsay Lecture Theatre.

UCL campus map. Chemistry building is marked by red circle.

Map from Euston station. Red line shows the way towards chemistry building.

Heathrow Airport

There is direct London Underground (Metro) line to the central london. Use Piccadilly line from Heathrow to the King's Cross St. Pancras station. UCL camp is 10 minutes walk from the station.

Stansted and Gatwick Airports

Use Stansted Express/Gatwick Express train lines to the Victoria station. From Victoria Station take northbound Victoria Underground line to the Euston Station. The journey time is about 8 minutes. Chemistry building is within a short walking distance.

Committee Members

Arokia Nathan, University College London, UK

Samar Saha, Silterra Corp., USA

Bill Milne, Cambridge University, UK

Jamal Deen, McMaster University, Canada

Piero Migliorato, Cambridge University, UK

Reza Chaji, University of Waterloo, Canada

Maria Merlyne De Souza, Sheffield University, UK

James B. Kuo, National Taiwan University, Taiwan

Benjamin Iniguez, Universitat Rovira i Virgili, Spain

Hyun Jae Kim, Yonsei University, Korea

Norbert Fruehauf, University of Stuttgart, Germany

Zhou Xing, Nanyang Technological University, Singapore