XClose

UCL Department of Electronic and Electrical Engineering

Home
Menu

L3MATRIX Large Scale Silicon Photonics Matrix project : Low Power & Low Cost Data Centre technology

10 September 2019

The EU funded L3MATRIX project delivered a solution to challenges related to scaling, latency and optical reach, enabling a smooth transition to low-cost and low-power Pb/s scale interconnection networks for Data Centres.

optical interconnects

Author : Dr David Selviah

d.selviah@ucl.ac.uk

Silicon Photonics | Optical Interconnects | Quantum Dots

 Continual increases in global internet traffic impose significant challenges for data centre (DC) operators and equipment manufacturers. The almost exponential growth of both intra- and inter-DC traffic is due to the continuous growth in cloud-based applications, social media and big data analytics. Modern DCs utilize hundreds of thousands of servers in several hierarchy layers requiring an efficient interconnection network which is both low-cost and energy efficient. In addition, the switching platforms must support the high bandwidths required for large scale non-blocking topologies. These severe requirements are difficult to fulfil using conventional electronic packet switching and copper-based interconnection technologies due to their high-power consumption, limited reach and increasing latency. The introduction of photonic technologies to the DC in recent years has resulted in significant improvements, however, the traffic increases outpace the technological capabilities and new approaches are needed. L3MATRIX "Large Scale Silicon Photonics Matrix for Low Power and Low-Cost Data Centres", addresses these challenges by devising solutions for cost reduction with improved efficiency and performance. 

 
The project developed novel technological innovations in the fields of silicon photonics (SiP) and 3D device integration. The potential for network scaling to the Pb/s range is demonstrated by co-packaging the optical interconnects with the switching ASIC, thereby increasing the chip radix which would otherwise be the main limit to bandwidth scaling. The optical interconnect is implemented as a large, two-dimensional SiP matrix providing both the required data density due to the parallel layout of the device, and long reach as it is a single mode optical solution. Packet parsing and switching are assigned to the ASIC. This solution is both low-cost and low-power due to the vertical integration of the optical matrix and CMOS logic chip. The on-chip assembly of the optical interconnect transceiver is a natural evolutionary step in the optical interconnect industry. The outcome of this long reach photonic-digital integration ‘co-package’ is the creation of radically new system and network architectures that enable scaling of the network to Pb/s scale using a fraction of the devices that would be needed otherwise. The result is a 10× reduction in the power consumption since the number of switching devices is lower compared to conventional technology. Latency is greatly reduced into the 10-20 ns range as the number of hops that a packet needs to make is smaller since less switching layers are being deployed in the network.
 
The project brought together leading European companies, universities, and research institutes with great expertise and experience in silicon photonics, III-V materials, and 3D device integration. Fraunhofer Institute for Reliability and Microintegration IZM led the project as project coordinator with Dust Photonics (Israel) as technology manager with additional consortium partners University College London (United Kingdom), ams AG (Austria), IBM Research GmbH (Switzerland), Aristotelio Panepistimio Thessalonikis (Greece), University Politecnica de Valencia (Spain) and Bright Photonics BV (Netherlands).
 
L3MATRIX developed a new method of building switching elements for Data Centres that combined a high radix connectivity architecture with an extended bandwidth of 25 Gb/s in single mode fibres and waveguides with low latency. The outcome of this approach is that large networks, in the Pb/s scale can be built as a single stage, non-blocking network with 10-fold lower power consumption than in conventional technology.
 
The research and innovation project L3MATRIX was co-funded by the Horizon 2020 Framework Programme of the European Union – ‘ICT-27-2015 - Photonics KET’ an initiative of the Photonics Public Private Partnership.
 
UCL developed improved semiconductor quantum dot MBE growth, characterization and laser gain stack designs.